A power grid distributes power and ground voltages to the devices in a design of an integrated circuit (i.e., chip). Designing power grids has become more complex due to increasing device counts, increasing placement densities, faster switching frequencies, and increasing power consumption. This requires the grid designer to compensate for voltage drops due to the resistance of the power grid interacting with the currents drawn by the various devices on the chip. Excessive voltage drops may reduce switching speeds and noise margins of circuits, and may inject noise that causes functional failures. A power grid is typically designed for an average cell placement density and an average current consumption. Thus the grid designer typically assumes that power density is fixed when designing a preliminary grid, and later adapts the grid design once the chip design is fleshed out in detail, and voltage drop violations are discovered.